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如果是s3，通过120MHz DDR OctalSPI理论能满足速率需求，我还没见人试过。如果是c5，其PSRAM只支持120MHz SDR QuadSPI就远远不够了。现有的方案是让cpu以120M...

引用第12楼warmonkey于2009-02-24 19:55发表的 :我上一个C写的计时器吧，但是完整的程序和测试要几天，我会开主题贴的。~~~我又找到了 C的列子 ~~ 和上边的汇编是...

【航电设备及其相关】 AHRS设计方案 https://www.kechuang.org/t/35973 (出处: 科创论坛) 【H3C小组】我们火箭的自动控制、航拍及定位回收航电设备【依然有图】 ...

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